Entity ad9252_adc_ctrl is
Port
(
clk_40m : in std_logic; -- 40 mhz
clk_200m : in std_logic; -- Must be 200 Mhz +- 10%
rst : in std_logic;
ADC_DCO_I : in std_logic; -- Data Clock Digital Output
ADC_DCO_IB : in std_logic; -- Data Clock Digital Output
ADC_FCO_I : in std_logic; -- Frame Clock Digital Output
ADC_FCO_IB : in std_logic; -- Frame Clock Digital Output
----------------------------------------------------------------------------------
adc_idly_frame_ce : in std_logic;
adc_idly_frame_inc : in std_logic;
adc_idly_clk_ce : in std_logic;
adc_idly_clk_inc : in std_logic;
----------------------------------------------------------------------------------
adc_idly_d1_ce : in std_logic;
adc_idly_d1_inc : in std_logic;
adc_idly_d2_ce : in std_logic;
adc_idly_d2_inc : in std_logic;
adc_idly_d3_ce : in std_logic;
adc_idly_d3_inc : in std_logic;
adc_idly_d4_ce : in std_logic;
adc_idly_d4_inc : in std_logic;
adc_idly_d5_ce : in std_logic;
adc_idly_d5_inc : in std_logic;
adc_idly_d6_ce : in std_logic;
adc_idly_d6_inc : in std_logic;
adc_idly_d7_ce : in std_logic;
adc_idly_d7_inc : in std_logic;
adc_idly_d8_ce : in std_logic;
adc_idly_d8_inc : in std_logic;
----------------------------------------------------------------------------------
ADC_CH1_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH1_DQ_IB : in std_logic; -- ADC Digital Output
ADC_CH2_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH2_DQ_IB : in std_logic; -- ADC Digital Output
ADC_CH3_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH3_DQ_IB : in std_logic; -- ADC Digital Output
ADC_CH4_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH4_DQ_IB : in std_logic; -- ADC Digital Output
ADC_CH5_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH5_DQ_IB : in std_logic; -- ADC Digital Output
ADC_CH6_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH6_DQ_IB : in std_logic; -- ADC Digital Output
ADC_CH7_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH7_DQ_IB : in std_logic; -- ADC Digital Output
ADC_CH8_DQ_I : in std_logic; -- ADC True Digital Output
ADC_CH8_DQ_IB : in std_logic; -- ADC Digital Output
----------------------------------------------------------------------------------
ADC_CSB : out std_logic;
ADC_SCLK : out std_logic;
ADC_SDIO : inout std_logic;
----------------------------------------------------------------------------------
adc_dout_ch1 : out std_logic_vector(13 downto 0);
adc_dout_ch2 : out std_logic_vector(13 downto 0);
adc_dout_ch3 : out std_logic_vector(13 downto 0);
adc_dout_ch4 : out std_logic_vector(13 downto 0);
adc_dout_ch5 : out std_logic_vector(13 downto 0);
adc_dout_ch6 : out std_logic_vector(13 downto 0);
adc_dout_ch7 : out std_logic_vector(13 downto 0);
adc_dout_ch8 : out std_logic_vector(13 downto 0);
----------------------------------------------------------------------------------
adc_clk : out std_logic
);
End ad9252_adc_ctrl;
