Entity ad9252_adc_ctrl is
Port
(
clk_40m : in std_logic; -- 40 mhz
clk_200m : in std_logic; -- Must be 200 Mhz +- 10%
rst : in std_logic;
ADC_DCO_I : in std_logic; -- Data Clock Digital Output
ADC_DCO_IB : in std_logic; -- Data Clock Digital Output
ADC_FCO_I : in std_logic; -- Frame Clock Digital Output
ADC_FCO_IB : in std_logic; -- Frame Clock Digital Output
